Among insulated gate devices, (IGD), the insulated gate transistor (IGT) is a device capable of controlling a high device current with a low bias voltage applied to its gate electrode. This gate control characteristic makes the IGT particularly useful for power control and current switching applications. A typical IGT comprises a plurality of small, parallel-connected cells fabricated in a semiconductor substrate or wafer. Each cell comprises, in series, adjacent collector, drift, base and emitter regions of alternate conductivity types.
A gate electrode is insulatively separated from the semiconductor substrate by an insulating region which includes a plurality of contact windows. Each contact window overlies one of the cells and is centered thereon so as to expose adjacent emitter and base region surfaces. Collector and emitter electrodes are connected, respectively, at opposite ends of each cell and conduct the current into and out of the cell. The magnitude of the device current is controlled by the magnitude of a bias voltage applied to the gate electrode by a gate control circuit. A typical collector electrode may comprise a conductive layer in continuous ohmic contact with a single, distributed collector region, the latter shared by all the cells in the wafer. In contrast, a typical emitter electrode comprises a conductive layer which makes ohmic contact with each cell only at the emitter and base region surface portions exposed within each contact window.
Prior art devices are typically constructed with a plurality of small, mutually spaced, square, rectangular or circular contact windows, each of which exposes a similarly sized and shaped cell. Each such cell has a cell emitter region surrounding a central base portion, wherein the emitter region surface is disposed continuously along the cell window periphery. The portion of the base region underlying the gate electrode and adjacent the base region surface becomes a channel for current conduction upon application of the appropriate bias voltage to the gate electrode. Current flows from the collector electrode, through the collector and drift regions, then through the channel across an emitter-base junction, through the emitter region, and into the emitter electrode. Each channel and each emitter region has a shape approaching that of half a toroid formed by the intersection of a plane at right angles to the toroid axis. Depending on whether the toroid has a round, square or rectangular shape, a contact window of similar shape is provided and is defined by the intersecting plane.
The gate bias voltage controls the depth of the channel, as measured from the intersecting plane. The maximum current which the channel for a particular cell can conduct is proportional to the cross-sectional area of the channel available for current flow. A limit on this cross-sectional area is the width of the emitter-base junction available for current flow from the channel to the emitter region. The width of the emitter-base junction normal to current flow from the channel to the emitter region defines the cell gate periphery.
Under certain conditions, either during turn-on or during operation of the IGT, the load which is being driven by the IGT may be shorted-out. Under these conditions, the IGT may be simultaneously exposed to full line voltage and high current, which may cause the destruction of the device.
Another problem associated with a short circuit is latch-up of the IGT, which results in loss of gate control. This can occur when the device current exceeds a certain threshold. However, if the IGT can survive under conditions of simultaneous high current and high voltage long enough for the condition to be sensed, i.e. for about 10 microseconds, and if the IGT does not latch up during this interval, the gate control circuit will be able to turn the device off.
Still another concern relating to the operation of IGTs is the forward voltage drop across the device at its operating current. A high forward voltage drop results in problems of device power consumption and device heating which may adversely impact device operation.